Qualcomm technical article 013
Snapdragon X2 Plus
How the two 3 nm Windows-PC processors combine third-generation Oryon CPU cores, an integrated Adreno GPU, an 80-TOPS Hexagon NPU and a 152 GB/s memory system.What it is
Snapdragon X2 Plus is Qualcomm’s second-generation mid-range Windows-on-Arm PC platform. It is a complete system-on-chip: CPU, graphics, AI acceleration, memory controller, display, video, camera, security and high-speed I/O are integrated around one shared LPDDR5x memory pool.
The family has two parts. X2P-64-100 combines six Prime and four Performance Oryon cores; X2P-42-100 uses six Prime cores only. Both retain the same 80-TOPS NPU, 128-bit memory interface and maximum memory capacity, while CPU cache and GPU frequency differ.
Two processor variants
| Specification | X2P-64-100 | X2P-42-100 |
|---|---|---|
| CPU configuration | 6 Prime + 4 Performance cores | 6 Prime cores |
| Maximum multithread frequency | Prime: 4.0 GHz; Performance: 3.4 GHz | Prime: 4.0 GHz |
| Single-core boost | 4.04 GHz | 4.04 GHz |
| Total cache | 34 MB | 22 MB |
| Adreno GPU | X2-45 at 1.7 GHz | X2-45 at 0.9 GHz |
| Hexagon NPU | 80 TOPS INT8 | 80 TOPS INT8 |
| Memory | Up to 128 GB; 152 GB/s | Up to 128 GB; 152 GB/s |
SoC architecture
How work moves through the chip
- Windows schedules CPU work.Oryon cores run the operating system, native ARM64 applications and control-heavy code.
- Graphics and parallel kernels move to Adreno.The GPU renders displays and accelerates supported DirectX, Vulkan or OpenCL workloads.
- Supported AI graphs target Hexagon.Runtimes compile compatible operators for the 80-TOPS NPU; unsupported or unsuitable operators remain on CPU or GPU.
- Engines share system memory.CPU, GPU and NPU read the same LPDDR5x pool, reducing explicit copies between separate memory devices.
- Fixed-function blocks handle media.The VPU encodes and decodes video, the ISP processes camera data and the DPU drives internal and external displays.
- External controllers use dedicated links.PCIe, USB4, storage and optional wireless modules connect the SoC to the rest of the laptop.
Memory and AI data movement
Both parts use a 128-bit LPDDR5x interface at 9,523 MT/s, producing a published peak of 152 GB/s and supporting up to 128 GB. The capacity is an OEM design maximum; individual laptops may install less.
For local models, unified physical memory lets weights and intermediate tensors remain accessible to more than one compute engine. This avoids a discrete GPU’s separate VRAM boundary, but does not make transfers free: cache behaviour, memory contention, operator layout and runtime support still determine effective throughput.
| Resource | Published value | Practical role |
|---|---|---|
| LPDDR5x transfer rate | 9,523 MT/s | Moves data on each memory-interface pin. |
| Bus width | 128 bit | Defines the aggregate path between SoC and memory packages. |
| Peak bandwidth | 152 GB/s | Shared ceiling for CPU, GPU, NPU and other clients. |
| Maximum capacity | 128 GB | Upper platform support, subject to laptop design. |
| CPU cache | 34 MB or 22 MB total | Keeps frequently used instructions and data off LPDDR5x. |
Media, display and I/O
| Subsystem | Published capability | Function |
|---|---|---|
| Internal display | eDP 1.5; up to 4K at 144 Hz | Drives the laptop panel. |
| External display | DisplayPort 2.1; up to three 4K 144 Hz or 5K 60 Hz displays | Feeds external monitors; implementation varies by OEM. |
| Video decode | AV1, HEVC and AVC up to 8K 60 fps | Fixed-function playback without using CPU cores for the full codec. |
| Video encode | HEVC/AVC 8K 30 fps; AV1 8K 15 fps or 4K 60 fps | Recording, conferencing and content export. |
| Camera | Dual 18-bit Spectra ISPs; up to 36 MP; 4K 30 fps capture | Processes sensor streams and always-sensing functions. |
| PCIe | 8 Gen 5 lanes + 4 Gen 4 lanes | NVMe and other high-speed controllers. |
| USB | Three USB-C interfaces; USB4 at 40 Gb/s | Data, display and peripheral connectivity. |
Security, management and wireless
| Component | Role | Qualification |
|---|---|---|
| Qualcomm SPU + Microsoft Pluton | Hardware-backed identity, secrets and chip-to-cloud security functions. | Actual policy depends on firmware, Windows and OEM configuration. |
| Snapdragon Guardian | Optional out-of-band management over cellular or Wi-Fi. | Requires supported device hardware and service configuration. |
| FastConnect 7800 | Optional Wi-Fi 7 across 2.4, 5 and 6 GHz; Bluetooth 5.4. | Attached through M.2 PCIe 3.0. |
| Snapdragon X75 | Optional 5G modem-RF system; up to 10 Gb/s down and 3.5 Gb/s up. | Peak modem figures are not typical network speed. |
| Sensing Hub | Dual micro-NPUs for low-power contextual sensing. | Separate from the main 80-TOPS Hexagon NPU rating. |
Terms
- SoC
- System-on-chip integrating multiple compute and I/O blocks.
- Oryon
- Qualcomm’s custom ARM64-compatible CPU architecture.
- TOPS
- Trillion operations per second under a stated numeric format.
- NPU
- Processor specialised for neural-network operations.
- Unified memory
- One physical memory pool visible to multiple compute engines.
- ISP
- Image signal processor for camera data.
- VPU
- Fixed-function video processing unit.
- DPU
- Display processing unit in this PC context.
Limits of the evidence
- 80 TOPS is the main NPU’s peak INT8 rating, not end-to-end application performance.
- Qualcomm does not publish CPU IPC, GPU shader count, package power or sustained clocks in the cited brief.
- Memory, display, modem and port figures are platform maxima; an OEM may implement fewer resources.
- The 4.04 GHz boost entry in the launch brief is a single-core condition, not an all-core frequency.
- Software compatibility and NPU offload depend on Windows, drivers, runtimes and application support.
- Battery-life and comparative-performance claims are excluded.
- Price and promotional material are excluded.
Sources
- Snapdragon X2 Plus product briefComplete two-part specification table, compute blocks, memory, media and I/O.
- Snapdragon X2 Plus product pageCurrent part numbers and Qualcomm comparison table.
- Snapdragon X2 Plus announcementLaunch scope, two configurations and device timing.
- Qualcomm CES 2026 press kitLaunch assets and original product-brief provenance.